European Yield Forum
14 September 2010
Regensburg, Germany
presented by Rudolph Technologies
Register Today!
Location: Sorat Hotel, Müllerstraße 7, D-93059, Regensburg, Germany
Returning to Regensburg, the Yield Forum provides process engineers, fab managers and tool owners with new application data and process control techniques that address current process challenges.
Presenters
| Altis | GlobalFoundries | ST |
| Analog Devices | Infineon | TIPS |
| ASML | NXP | Verigy |
| Feinmetal | Rudolph | X-FAB |
2010 Agenda:
Keynote speech by ASML
Lithography, a Key Enabler for Continued Shrink
Wafer Fab (Front-end) Session
- Re-evaluating the CoO Impact of Waferless Recipe Creation for Inline CMP Advanced Macro Inspection
- Young Modulus In-line Characterization of Low-k ILD's
- Using ADC to Lower Cost of Ownership without Degrading Performance
- All-Surface Inspection for Immersion Lithography
- Equipment Life Cycle Analysis
- Advanced Metrology for 32nm Process Node and Beyond
- Advantage of Using Parametric App in a Foundry Fab
Assembly and Test (Back-end) Session
- Trends in Back-end Inspection
- 2D/3D Bump Inpsection on eWLB Wafers
- Complex MEMS Inspection
- Visual Inspection of CMOS Image Sensor Manufactured by TSV Technology
- Reduced Review
- Solutions and Approaches to TSV Inspection and Metrology
- Microbump and RDL Inspection
Probe Session
- Optimizing Test Cell Performance
- Performance Challenges, Direct-Probe Solution
- Cleaning, Reshaping and Sanding Probe Tips Using the PC Analyzer
- From WaferWoRx Analysis to Wafer Sort Yield
- Probe Process Control
- Multi-Purpose System for Probing Process Analysis
- Offline Reshaping and Cleaning for Cantilever, Vertical and Lithographic Probe Cards
- PrecisionWoRx VX4 Update
Program: 09:00 to 17:00
Reception follows
For more information:
Contact: Amy Pauling
Email: amy.pauling@rudolphtech.com
Tel: +1-952-259-1794
Accommodations are available at the Sorat Hotel - book before September 3 to guarantee.
(+49 (0) 941-8104454). Request the Rudolph Rate.