Semiconductor Manufacturing Magazine, June 2005

Abstract
In this paper, we describe a solution for wafer edge and bevel apex defect inspection for a 300mm semiconductor automated fab. Traditionally, we have used an advanced macro inspection solution for topside wafer inspection. The automated tool revealed that defects surfacing after the back end of line (BEOL) copper chemical mechanical pol-ish planarization (Cu CMP) process were significantly impacting yields. We suspected that particles and film on the edge and bevel were flaking off on to the top of the wa-fers, causing the yield degradation. However, we needed more information from the edge to confirm our hypothesis. Since offline manual edge analysis was not cost-effective for larger wafer sampling, we sought to develop an inline bevel inspection at the CMP sector that was fast, cost-effective, and integrated with the advanced macro inspec-tion tool. We also established a long-term goal of expand-ing the process into an all-surfaces inspection within one manufacturing operation step.

This paper describes how we integrated the top-down macro and edge bevel inspection into a single automated operation, enhancing data collection and our ability to take corrective action. The process includes full top and com-plete edge bevel inspection of less than 10 percent of each lot. Although we ran sample tests to inspect edges after numerous processes, this paper focuses on BEOL Cu CMP inspection, including data collection and corrective ac-tions. We also highlight the benefits of edge inspection, and the new level of automated process control.

As a result of edge inspection, we have taken corrective actions that have reduced defects on the edge bevel, and improved wafer final test yields by 10 percent from the baseline.